Semiconductor structure and method of fabricating the same
US8664060B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2012 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | May 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6744
Abstract
A semiconductor structure and a method of fabricating the same comprising the steps of providing a substrate, forming at least one fin structure on said substrate, forming a gate covering said fin structure, forming a plurality of epitaxial structures covering said fin structures, performing a gate pullback process to reduce the critical dimension (CD) of said gate and separate said gate and said epitaxial structures, forming lightly doped drains (LDD) in said fin structures, and forming a spacer on said gate and said fin structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.