Patent · US Active

Method of producing a device with transistors strained by means of an external layer

US8664104B2 · kind B2 · utility

3Cited by

5References

14Claims

0Family size

Assignee

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

Fabrice Nemouchi · Moirans, FR
Patrice Gergaud · La Buisse, FR
Thierry Poiroux · Voiron, FR
Bernard Previtali · Grenoble, FR

Key dates

Filing date	Aug 22, 2012
Grant date	Mar 4, 2014
Priority date	—
Expiry date	Aug 22, 2032

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/021
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method of producing a microelectronic device with transistors wherein a strain layer is formed on a series of transistors and the strain exerted on at least one given transistor of said series is released by removing a sacrificial layer situated between said given transistor and said strain layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.