Method and apparatus for processing data in an embedded system
US8667254B1 · kind B1 · utility
5Cited by
21References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2008 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Sep 23, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a network device is disclosed. For example, in one embodiment of the present invention, the device comprises a processor and a core memory having a receive buffer and a transmit buffer. The device comprises a bus coupled to the processor and the core memory. The device comprises at least one co-processor coupled to the core memory via a direct link, wherein the at least one co-processor is capable of accessing at least one of: the receive buffer, or the transmit buffer, without assistance from the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.