TCAD emulation calibration method of SOI field effect transistor
US8667440B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2011 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Sep 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A calibration method for a device using TCAD to emulation SOI field effect transistor, where process emulation MOS device structures with different channel lengths Lgate are obtained by establishing a TCAD process emulation program; the process emulation MOS device structures are calibrated according to a TEM test result, a SIMS test result, a CV test result, a WAT test result, and a square resistance test result of an actual device, so as to complete TCAD emulation calibration of key electrical parameters of an SOI field effect transistor. Thereby, providing effective guidance for research, development and optimization of a new process flow are realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.