Self-calibrating relaxation oscillator based clock cycle
US8669817B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2011 |
| Grant date | Mar 11, 2014 |
| Priority date | — |
| Expiry date | Feb 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/089
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A technique and corresponding circuitry are presented for a process independent, self-calibrating relaxation based clock source. The technique and circuitry presented here can reduce the time and cost needed for calibration significantly. The relaxation based clock source produces a clock signal whose frequency is dependent upon a trim value. Starting from an initial trim value, the clock signal is generated, its frequency is compared with a reference clock frequency value, and the trim value is correspondingly adjusted up or down a bit at a time. After this process has continued for a while, min-max logic is used to determine the maximum and minimum trim values and, based on these, the final trim value for the clock is set. This calibration process can also be used to extract whether, and by how much, the implementation on silicon of a particular chip lies in the fast or slow process corners.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.