Multi-threaded deterministic router
US8671379B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2012 |
| Grant date | Mar 11, 2014 |
| Priority date | — |
| Expiry date | Oct 19, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Within a system comprising a plurality of processors and a memory, a method of determining routing information for a circuit design for implementation within a programmable integrated circuit can include determining that nets of the circuit design comprise overlap and unrouting nets comprising overlap. A congestion picture can be determined that comprises costs of routing resources for the integrated circuit wherein the cost of a routing resource comprises a measure of historical congestion and a measure of current congestion, and wherein unrouted nets do not contribute to the measures of current congestion in the congestion picture. The method further can include concurrently routing a plurality of the unrouted nets via the plurality of processors executing in parallel according to the congestion picture and storing routing information for nets of the circuit design in the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.