FinFET and method for manufacturing the same
US8673704B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2012 |
| Grant date | Mar 18, 2014 |
| Priority date | — |
| Expiry date | May 14, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
A FinFET and a method for manufacturing the same are disclosed. The FinFET comprises an etching stop layer on a semiconductor substrate; a semiconductor fin on the etching stop layer; a gate conductor extending in a direction perpendicular to a length direction of the semiconductor fin and covering at least two side surfaces of the semiconductor fin; a gate dielectric layer between the gate conductor and the semiconductor fin; a source region and a drain region which are provided at two ends of the semiconductor fin respectively; and an interlayer insulating layer adjoining the etching stop layer below the gate dielectric layer, and separating the gate conductor from the etching stop layer and the semiconductor fin. A height of the fin of the FinFET is approximately equal to a thickness of a semiconductor layer for forming the semiconductor fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.