Reconfigurable processor with predicate signal activated operation configuration memory and separate routing configuration memory
US8677099B2 · kind B2 · utility
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5References
11Claims
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Key dates
| Filing date | Sep 21, 2009 |
| Grant date | Mar 18, 2014 |
| Priority date | — |
| Expiry date | Dec 29, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a reconfigurable processor and operating method thereof. The reconfigurable processor may use a configuration memory distributed to each operation unit. The distributed configuration memory may be separated into a distributed operation configuration memory including configuration information about an operation of a function unit, and a distributed routing configuration memory including configuration information about routing. The distributed operation configuration memory may be activated according to a predicate signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.