Gallium nitride devices with vias
US8680570B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 2013 |
| Grant date | Mar 25, 2014 |
| Priority date | — |
| Expiry date | Jan 4, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/8312
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.