Trench filling method and method of manufacturing semiconductor integrated circuit device
US8685832B2 · kind B2 · utility
6Cited by
7References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 24, 2012 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Aug 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a trench filling method, which includes: forming a silicon oxide liner on a semiconductor substrate with trenches formed therein, the trenches including narrow-width portions having a first minimum isolation width and wide-width portions having a second minimum isolation width being wider than the first minimum isolation width; forming an oxidation-barrier film on the silicon oxide liner; forming a silicon liner on the oxidation-barrier film; filling the narrow-width portions with a first filling material; filling the wide-width portions with a second filling material; and oxidizing the silicon liner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.