Patent · US Active

MOS device with memory function and manufacturing method thereof

US8685851B2 · kind B2 · utility

2Cited by
8References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 27, 2011
Grant dateApr 1, 2014
Priority date
Expiry dateFeb 11, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/60
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A manufacturing method of a MOS device with memory function is provided, which includes: providing a semiconductor substrate, a surface of the semiconductor substrate being covered by a first dielectric layer, a metal interconnect structure being formed in the first dielectric layer; forming a second dielectric layer overlying a surface of the first dielectric layer and the metal interconnect structure; forming an opening in the second dielectric layer, a bottom of the opening revealing the metal interconnect structure; forming an alloy layer at the bottom of the opening, material of the alloy layer containing copper and other metal; and performing a thermal treatment to the alloy layer and the metal interconnect structure to form, on the surface of the metal interconnect structure, a compound layer containing oxygen element. The compound layer containing oxygen element and the MOS device formed in the semiconductor substrate constitute a MOS device with memory function. The method provides a processing which has high controllability and improves the performance of devices.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.