NAND flash memory of using common P-well and method of operating the same
US8687424B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2009 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Mar 5, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory using hot carrier injection and a method of operating the same are provided. A plurality of strings constituting a page are formed on a single p-well and share the p-well. During a program operation, a string selection transistor is turned off, and electrons are accumulated in a source or drain region in response to a bias voltage applied to the p-well. Thereafter, the accumulated electrons are trapped in a charge trap layer of a memory cell in response to a program voltage applied through a word line. Also, during an erase operation, holes accumulated in response to a bias voltage applied to the p-well are trapped in the charge trap layer in response to an erase voltage. The flash memory performs NAND-type program and erase operations using hot carrier injection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.