Patent · US Active

Determination of running status of logical processor

US8689230B2 · kind B2 · utility

2Cited by
3References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 14, 2012
Grant dateApr 1, 2014
Priority date
Expiry dateSep 14, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/5077
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An embodiment provides for operating an information processing system. An aspect of the invention includes allocating an execution interval to a first logical processor of a plurality of logical processors of the information processing system. The execution interval is allocated for use by the first logical processor in executing instructions on a physical processor of the information processing system. The first logical processor determines that a resource required for execution by the first logical processor is locked by another one of the other logical processors. An instruction is issued by the first logical processor to determine whether a lock-holding logical processor is currently running. The lock-holding logical processor waits to release the lock if it is currently running. A command is issued by the first logical processor to a super-privileged process for relinquishing the allocated execution interval by the first logical processor if the locking holding processor is not running.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.