Method of manufacturing semiconductor device, manufacturing program, and manufacturing apparatus
US8691628B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2011 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Jan 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method of manufacturing a semiconductor device, a bonding layer is formed on a first surface of a chip region of a semiconductor wafer. Semiconductor chips are singulated along a dicing region. The semiconductor chips are stacked stepwise via the bonding layer. In formation of the bonding layer of the semiconductor chip, in at least a part of a first region of the first surface not in contact with the other semiconductor chip in a stacked state, a projected section where the bonding layer is formed thicker than the bonding layer in a second region that is in contact with the other semiconductor chip is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.