TSV pillar as an interconnecting structure
US8691691B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2011 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Jun 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention includes embodiments of a processing method, and resulting structure, for building a chip having a TSV pillar which can be used as an interconnecting structure. The process includes the deposition of a dual diffusion barrier between the TSV and the substrate the TSV is embedded within. The TSV is then exposed from the back side of the substrate so that at least a portion of the TSV protrudes from the substrate and can be used as a contact for connecting the chip to another surface. The resulting TSV is rigid, highly conductive, can be placed in a tightly pitched grid of contacts, and reduces effects of CTE mismatch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.