Methods, systems, and articles of manufacture for implementing electronic circuit designs with simulation awareness
US8694933B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2010 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | May 4, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are methods, systems, and articles of manufacture for implementing electronic designs with simulation awareness. A schematic is identified or created and simulated at the schematic level to characterize the functional behavior of the circuit or to ensure the circuit design meets the required design specifications. Physical data of a component of the design is identified, created, or updated, and the electrical parasitic associated with physical data is characterized. One or more electrical characteristics associated with the parasitic is further characterized and mapped to the simulator to re-simulate the circuit design to analyze the impact of parasitics. Some embodiments re-run the same simulation process incrementally in an interactive manner by accepting incremental design or parameter changes from the design environment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.