Semiconductor device having insulating film with different stress levels in adjacent regions and manufacturing method thereof
US8697509B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 26, 2012 |
| Grant date | Apr 15, 2014 |
| Priority date | — |
| Expiry date | Jul 26, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
Abstract
An n-channel MISFETQn is formed in an nMIS first formation region of a semiconductor substrate and a p-channel MISFETQp is formed in an adjacent pMIS second formation region of the semiconductor substrate. A silicon nitride film having a tensile stress is formed to cover the n-channel MISFETQn and the p-channel MISFETQp. In one embodiment, the silicon nitride film in the nMIS formation region and the pMIS formation region is irradiated with ultraviolet rays. Thereafter, a mask layer is formed to cover the silicon nitride film in the nMIS formation region and to expose the silicon nitride film in the pMIS formation region. The silicon nitride film in the pMIS formation region is then subjected to plasma processing, which relieves the tensile stress of the silicon nitride film in the pMIS formation region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.