Tatsunori Murata
24Patents
3h-index
31Co-inventors
59Inventor score
Filing activity: Jan 14, 2004 → Dec 9, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9318818B2 | Electrical connector and manufacturing method thereof | Emerging Cross-Sectional Technologies | 5 | Active |
| US9263320B2 | Method of manufacturing semiconductor device | Electricity | 5 | Active |
| US7259052B2 | Manufacture of a semiconductor integrated circuit device including a pluarality of a columnar laminates having different spacing in different directions | Electricity | 3 | Expired |
| US7772662B2 | Semiconductor device and manufacturing method thereof | Electricity | 3 | Active |
| US7935542B2 | Manufacturing method of semiconductor device having memory element with protective film | Physics | 3 | Active |
| US7482650B2 | Method of manufacturing a semiconductor integrated circuit device having a columnar laminate | Electricity | 3 | Active |
| US8089112B2 | Semiconductor device and manufacturing method thereof | Electricity | 2 | Active |
| US8216859B2 | Manufacturing method of semiconductor device having memory element with protective film | Physics | 2 | Active |
| US7759722B2 | Semiconductor device and method of manufacturing the same | Electricity | 2 | Active |
| US7875539B2 | Semiconductor device | Electricity | 2 | Active |
| US8415756B2 | Semiconductor device and method of manufacturing the same | Electricity | 1 | Active |
| US8084343B2 | Semiconductor device | Electricity | 1 | Active |
| US8492847B2 | Semiconductor device having insulating film with increased tensile stress and manufacturing method thereof | Electricity | 1 | Active |
| US8685854B2 | Method of forming a via in a semiconductor device | Electricity | 1 | Active |
| US8084373B2 | Manufacturing method of semiconductor device for enhancing the current drive capability | Electricity | 1 | Active |
| US9536776B2 | Method of manufacturing semiconductor device | Electricity | 1 | Active |
| US9502282B2 | Method of semiconductor manufacture utilizing layer arrangement to improve autofocus | Electricity | 0 | Active |
| US10829862B2 | Tin-plated product and method for producing same | Chemistry; Metallurgy | 0 | Active |
| US8901668B2 | Semiconductor device having insulating film with different stress levels in adjacent regions and manufacturing method thereof | Electricity | 0 | Active |
| US9559141B2 | Manufacturing method of using hydrogen plasma processing on a semiconductor wafer | Electricity | 0 | Active |
| US7306984B2 | Method of manufacture of a semiconductor integrated circuit device including a plurality of columnar laminates having different spacing in different directions | Electricity | 0 | Active |
| US8697509B2 | Semiconductor device having insulating film with different stress levels in adjacent regions and manufacturing method thereof | Electricity | 0 | Active |
| US10304925B2 | Method of manufacturing semiconductor device | Electricity | 0 | Active |
| US7939871B2 | Semiconductor device and manufacturing method thereof | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.