Semiconductor device and method of manufacturing the same
US8698236B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 23, 2011 |
| Grant date | Apr 15, 2014 |
| Priority date | — |
| Expiry date | Sep 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
Abstract
The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N−− type semiconductor layer. A source layer including an N− type layer is disposed in a surface portion of the body layer. An N− type drift layer is formed in a surface portion of the N−− type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.