Electronic circuit arrangement with an electrical fuse
US8698275B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2006 |
| Grant date | Apr 15, 2014 |
| Priority date | — |
| Expiry date | Jun 17, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic circuit arrangement has a substrate which has at least one metallization layer. At least one electrical interconnect and/or at least one via are formed in the metallization layer such that the electrical interconnect and the via are in the form of an electrical fuse link. In addition, the substrate has electrical circuit components which are arranged in the circuit layer. The circuit components are electrically coupled to one another by means of the electrical interconnect and by means of a plurality of vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.