Integrated circuit testing with power collapsed
US8713388B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2011 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Apr 17, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318575
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In examples, apparatus and methods are provided for an integrated circuit. The integrated circuit includes a first integrated circuit portion having a main power domain and a second integrated circuit portion having a collapsible power domain. The integrated circuit also has a level shifter having an input coupled to the second circuit portion and an output coupled to the first integrated circuit portion. The level shifter is configured to hold constant the level shifter output when power to the collapsible power domain is collapsed. A quiescent drain current measurement circuit can be coupled to test at least a part of the second integrated circuit portion. A boundary scan register can be coupled between the level shifter output and the first integrated circuit portion. The integrated circuit can also include a power management circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.