Method of patterning a semiconductor device
US8716139B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2012 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Apr 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0332
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of patterning a semiconductor device including dividing a layout into more than one pattern. The method further includes depositing a film stack on a semiconductor substrate, depositing a hard mask on the film stack, and depositing a first photoresist on the hard mask. The method further includes patterning the first photoresist using a first pattern of the more than one pattern. The method further includes etching the hard mask to transfer a design of the first pattern of the more than one pattern to the hard mask. The method further includes depositing a second photoresist over the etched hard mask and patterning the second photoresist using a second pattern of the more than one pattern. The method further includes etching portions of the film stack exposed by a combination of the etched hard mask and the second photoresist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.