Memory having internal processors and methods of controlling memory access
US8719516B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2009 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Apr 21, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memories having internal processors and methods of data communication within such memories are provided. One such memory may include a fetch unit configured to substantially control performing commands on a memory array based on the availability of banks to be accessed. The fetch unit may receive instructions including commands indicating whether data is to be read from or written to a bank, and the address of the data to be read from or written to the bank. The fetch unit may perform the commands based on the availability of the bank. In one embodiment, control logic communicates with the fetch unit when an activated bank is available. In another implementation, the fetch unit may wait for a bank to become available based on timers set to when a previous command in the activated bank has been performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.