Memory device with error detection
US8719662B2 · kind B2 · utility
5Cited by
28References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2011 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Oct 3, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1008
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data move operations in a memory device are described that enable identification of data errors. Error detection circuitry in the memory device can be operated using parity data or ECC data stored in the memory. Results of the error detection can be accessed by a memory controller for data repair operations by the controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.