Lithography method and device
US8722320B2 · kind B2 · utility
1Cited by
3References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 27, 2011 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Jan 11, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0338
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Lithography methods and devices are shown that include a semiconductor structure such as a mask. Methods and devices are shown that include a pattern of mask features and a composite feature. Selected mask features include doubled mask features. Methods and devices shown may provide varied feature sizes (including sub-resolution) with a small number of processing steps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.