Method of fabricating a semiconductor device having an epitaxy region
US8722520B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 17, 2011 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Jan 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is described what includes providing a substrate having a first trench and a second trench. An epitaxy material (crystalline material) is formed in the first trench and in the second trench. The top surface of the epitaxy material in the first trench is noncollinear with a top surface of the epitaxy material in the second trench. An amorphous semiconductor layer is formed on the crystalline material. Subsequently, the amorphous layer is converted, in part or in whole, into the crystalline semiconductor material. In an embodiment, a planarization process after the conversion provides crystalline regions having a coplanar top surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.