Integrated field effect transistors with high voltage drain sensing
US8723178B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 20, 2012 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Feb 15, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/148
Abstract
An integrated circuit includes a junction field effect transistor (JFET) and a power metal oxide semiconductor field effect transistor (MOSFET) on a same substrate. The integrated circuit includes a drain sense terminal for sensing the drain of the power MOSFET through the JFET. The JFET protects a controller or other electrical circuit coupled to the drain sense terminal from high voltage that may be present on the drain of the power MOSFET. The JFET and the power MOSFET share a same drift region, which includes an epitaxial layer formed on the substrate. The integrated circuit may be packaged in a four terminal small outline integrated circuit (SOIC) package. The integrated circuit may be employed in a variety of applications including as an ideal diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.