Patent · US Active

Performing memory accesses while omitting unnecessary address translations

US8725984B2 · kind B2 · utility

0Cited by
7References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 6, 2012
Grant dateMay 13, 2014
Priority date
Expiry dateSep 6, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/655
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In computing environments that use virtual addresses (or other indirectly usable addresses) to access memory, the virtual addresses are translated to absolute addresses (or other directly usable addresses) prior to accessing memory. To facilitate memory access, however, address translation is omitted in certain circumstances, including when the data to be accessed is within the same unit of memory as the instruction accessing the data. In this case, the absolute address of the data is derived from the absolute address of the instruction, thus avoiding address translation for the data. Further, in some circumstances, access checking for the data is also omitted.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.