System and method for communication in a multithread processor
US8726292B2 · kind B2 · utility
2Cited by
10References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 25, 2005 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | May 8, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for Inter-Thread Communication using software interrupts in a multithread processor are disclosed. Bits in a shared control register and/or a private control register can enable an Inter-Thread Communication path. When the interrupt is triggered, one thread processor raises an interrupt in another thread processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.