Patent · US Active

Method for making FINFETs and semiconductor structures formed therefrom

US8729638B2 · kind B2 · utility

7Cited by
0References
8Claims
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Assignee

Inventors

Key dates

Filing dateNov 30, 2011
Grant dateMay 20, 2014
Priority date
Expiry dateNov 30, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/797

Abstract

A method for making FinFETs and semiconductor structures formed therefrom is disclosed, comprising: providing a SiGe layer on a Si semiconductor substrate and a Si layer on the SiGe layer, wherein the lattice constant of the SiGe layer matches that of the substrate; patterning the Si layer and the SiGe layer to form a Fin structure; forming a gate stack on top and both sides of the Fin structure and a spacer surrounding the gate stack; removing a portion of the Si layer which is outside the spacer with the spacer as a mask, while keeping a portion of the Si layer which is inside the spacer; removing a portion of the SiGe layer which is kept after the patterning, to form a void; forming an insulator in the void; and epitaxially growing stressed source and drain regions on both sides of the Fin structure and the insulator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.