Adjustable resistor
US8729668B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2012 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Jul 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
An adjustable resistor formed on a first insulating layer of a substrate, including: a first polysilicon layer covered with a second insulating layer of a first thickness, except in a region where the first polysilicon layer is covered with a thin insulator layer of a second thickness smaller than the first thickness; a second polysilicon layer covering the second insulating layer and the thin insulator layer; on each side of the second insulating layer and at a distance from it, a first and a second conductive vias providing access to the terminals of the resistor on the first polysilicon layer; and a third conductive via providing access to a contacting area on the second polysilicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.