Patent · US Active

Flip-chip wafer level package and methods thereof

US8729714B1 · kind B1 · utility

56Cited by
3References
8Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 31, 2012
Grant dateMay 20, 2014
Priority date
Expiry dateDec 31, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/181
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An electronic package includes a flip-chip component having a first die coupled to a flip-chip substrate, second die stacked on the first die, an encapsulation compound formed around the first die and the second die, a set of through encapsulant vias (TEVs) providing a set of electrical connections from a first side of the electronic package to a second side of the electronic package through the encapsulation compound to the flip-chip substrate, and a redistribution layer electrically connecting a set of contacts on the second die to the set of TEVs on the first side of the electronic package.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.