Electrostatic discharge protection circuit for an integrated circuit
US8730625B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 22, 2011 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Dec 19, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electrostatic discharge (ESD) protection circuit includes a clamping transistor and a trigger circuit. The clamping transistor is coupled between a first power supply voltage terminal and a second power supply voltage terminal. The trigger circuit includes a detection circuit, first and second transistors, and first, second, and third inverters. The detection circuit is coupled to monitor a power supply voltage. The first inverter has an input terminal coupled to a current electrode of the first transistor, and an output terminal coupled to a control electrode of the clamping transistor. The second inverter and the third inverter form a feedback path from the output of the first inverter to the control electrode of the first transistor. The second inverter has a switching voltage that is lower than a midpoint voltage of a power supply voltage provided to the first and second power supply voltage terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.