Apparatuses and methods for providing data from multiple memories
US8732433B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2011 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Oct 8, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0623
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses and methods for providing data are disclosed. An example apparatus includes a plurality of memories coupled to a data bus. The memories are configured to provide data to the data bus responsive, at least in part, to a first address. The plurality of memories are further configured to provide at least a portion of the data corresponding to the first address to the data bus during a sense operation for a second address provided to the plurality of memories after the first address. Each of the plurality of memories provides data to the data bus corresponding to the first address at different times. Moreover, a plurality of memories may be configured to provide at least 2N bits of data to the data bus responsive, at least in part, to an address, each of the plurality of memories configured to provide N bits of data to the data bus at different times.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.