Patent · US Active

Method for detecting embedded voids in a semiconductor substrate

US8735182B2 · kind B2 · utility

0Cited by
7References
16Claims
0Family size

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Inventors

Key dates

Filing dateJun 7, 2012
Grant dateMay 27, 2014
Priority date
Expiry dateJun 7, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for detecting embedded voids present in a structure formed in or on a semiconductor substrate is described. The method includes performing a processing step P1 for forming the structure; measuring the mass M1 of the substrate; performing thermal treatment; measuring the mass M2 of the substrate; calculating the mass difference between the mass of the substrate measured before and after the performed thermal treatment; and deducing the presence of embedded voids in the structure by comparing the mass difference with a pre-determined value.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.