Method and apparatus to limit memory power
US8738937B2 · kind B2 · utility
2Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2010 |
| Grant date | May 27, 2014 |
| Priority date | — |
| Expiry date | Apr 20, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention includes a power manager to receive a memory power usage value, to determine an available power based at least in part on a power budget and the memory power usage value, and to change a memory power state based at least in part on the available power, wherein the memory power state comprises a memory frequency and a memory voltage. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.