Automatic suspend atomic hardware transactional memory in response to detecting an implicit suspend condition and resume thereof
US8739164B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2010 |
| Grant date | May 27, 2014 |
| Priority date | — |
| Expiry date | May 12, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3834
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method is disclosed for a computer processor configured to access a memory shared by a plurality of processing cores and to execute a plurality of memory access operations in a transactional mode as a single atomic transaction and to suspend the transactional mode in response to determining an implicit suspend condition, such as a program control transfer. As part of executing the transaction, the processor marks data accessed by the speculative memory access operations as being speculative data. In response to determining a suspend condition (including by detecting a control transfer in an executing thread) the processor suspends the transactional mode of execution, which includes setting a suspend flag and suspending marking speculative data. If the processor later detects a resumption condition (e.g., a return control transfer corresponding to a return from the control transfer), the processor is configured to resume the marking of speculative data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.