Method of manufacturing semiconductor device
US8741161B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2012 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Aug 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a pillar on a base layer, forming a insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar, and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.