Semiconductor package and method of manufacturing the same
US8742551B2 · kind B2 · utility
2Cited by
5References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 17, 2012 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Dec 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package including: a lead frame including a chip attachment unit and a lead unit; a semiconductor chip that is mounted on the chip attachment unit of the lead frame; a wire that electrically connects the semiconductor chip to the lead unit; an insulation layer formed in the lead frame under the chip attachment unit; and an encapsulant that seals an upper portion of the lead frame, the semiconductor chip, and the wire, wherein the lead unit does not protrude to the outside of the encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.