Seal ring in an integrated circuit die
US8742583B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2012 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Apr 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06541
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The formation of a seal ring in a semiconductor integrated circuit (IC) die is described. Through-silicon vias (TSVs) are typically formed in a semiconductor IC die to facilitate the formation of a three dimensional (3D) stacking die structure. The TSVs may be utilized to provide electrical connections between components in different dies of the 3D stacking die structure. A seal ring is formed in the inter-metal dielectric (IMD) layers of an IC die, enclosing an active circuit region. The real ring is formed prior to the formation of the TSVs, preventing moistures or other undesired chemical agents from diffusing into the active circuit region during the subsequent processes of forming TSVs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.