Three-dimensional non-volatile memory device
US8743612B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2012 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Nov 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A three-dimensional (3-D) non-volatile memory device according to embodiment of the present invention includes a plurality of bit lines, at least one string row extending in a first direction coupled to the bit lines and including 2N strings, wherein the N includes a natural number, a common source selection line configured to control source selection transistors of the 2N strings included in a memory block, a first common drain selection line configured to control drain selection transistors of a first string and a 2N-th string among the 2N strings included in a memory block, and N−1 second common drain selection lines configured to control drain selection transistors of adjacent strings in the first direction among remaining strings other than the first string and the 2N-th string.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.