Protecting external volatile memories using low latency encryption/decryption
US8745411B2 · kind B2 · utility
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Key dates
| Filing date | Nov 6, 2009 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Aug 18, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing apparatus includes a volatile memory, a random number generator adapted for generating random numbers from which one or more keys are generated, and a memory encryption unit (MEU). The MEU is configured to receive an N-bit block of data and to divide the N-bit block of data into two more sub-blocks of data, where each sub-block contains fewer than N-bits. The MEU is further configured to encrypt each sub-block of data using the one more keys, to combine the encrypted sub-blocks into an N-bit block of encrypted data, and to write the encrypted N-bit block of data to the volatile memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.