Patent · US Active

Test structures, methods of manufacturing thereof, test methods, and MRAM arrays

US8750031B2 · kind B2 · utility

1Cited by

1References

20Claims

0Family size

Assignee

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

Ya-Chen Kao · Taoyuan, TW
Tien-Wei Chiang · Taipei, TW
Chun-Jung Lin · Baoshan, TW

Key dates

Filing date	Dec 16, 2011
Grant date	Jun 10, 2014
Priority date	—
Expiry date	Nov 20, 2032

Classification

Technology area (CPC H)Electricity
CPC primaryH10N50/01
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Test structures, methods of manufacturing thereof, test methods, and magnetic random access memory (MRAM) arrays are disclosed. In one embodiment, a test structure is disclosed. The test structure includes an MRAM cell having a magnetic tunnel junction (MTJ) and a transistor coupled to the MTJ. The test structure includes a test node coupled between the MTJ and the transistor, and a contact pad coupled to the test node.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.