Ya-Chen Kao
46Patents
8h-index
52Co-inventors
78Inventor score
Filing activity: Dec 13, 2002 → Aug 9, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6649489B1 | Poly etching solution to improve silicon trench for low STI profile | Electricity | 21 | Expired |
| US7683447B2 | MRAM device with continuous MTJ tunnel layers | Physics | 21 | Active |
| US8416600B2 | Reverse connection MTJ cell for STT MRAM | Electricity | 17 | Active |
| US8878318B2 | Structure and method for a MRAM device with an oxygen absorbing cap layer | Electricity | 14 | Active |
| US9659953B2 | HKMG high voltage CMOS for embedded non-volatile memory | Electricity | 13 | Active |
| US9276010B2 | Dual silicide formation method to embed split gate flash memory in high-k metal gate (HKMG) technology | Electricity | 9 | Active |
| US8760255B2 | Contactless communications using ferromagnetic material | Emerging Cross-Sectional Technologies | 8 | Active |
| US7667261B2 | Split-gate memory cells and fabrication methods thereof | Electricity | 8 | Active |
| US8110881B2 | MRAM cell structure with a blocking layer for avoiding short circuits | Electricity | 5 | Active |
| US9627392B2 | Method to improve floating gate uniformity for non-volatile memory devices | Electricity | 4 | Active |
| US9735245B2 | Recessed salicide structure to integrate a flash memory device with a high κ, metal gate logic device | Electricity | 3 | Active |
| US9431413B2 | STI recess method to embed NVM memory in HKMG replacement gate technology | Electricity | 3 | Active |
| US9425206B2 | Boundary scheme for embedded poly-SiON CMOS or NVM in HKMG CMOS technology | Electricity | 3 | Active |
| US7652318B2 | Split-gate memory cells and fabrication methods thereof | Electricity | 3 | Active |
| US6819593B2 | Architecture to suppress bit-line leakage | Physics | 3 | Expired |
| US9202817B2 | Semiconductor device and method for manufacturing the same | Electricity | 2 | Active |
| US10276588B2 | HKMG high voltage CMOS for embedded non-volatile memory | Electricity | 2 | Active |
| US8450722B2 | Magnetoresistive random access memory and method of making the same | Electricity | 2 | Active |
| US7834410B2 | Spin torque transfer magnetic tunnel junction structure | Electricity | 2 | Active |
| US8570792B2 | Magnetoresistive random access memory | Electricity | 2 | Active |
| US8750031B2 | Test structures, methods of manufacturing thereof, test methods, and MRAM arrays | Electricity | 1 | Active |
| US9379316B2 | Method of fabricating a magnetoresistive random access structure | Electricity | 1 | Active |
| US8648401B2 | Domain wall assisted spin torque transfer magnetresistive random access memory structure | Electricity | 1 | Active |
| US9412721B2 | Contactless communications using ferromagnetic material | Emerging Cross-Sectional Technologies | 1 | Active |
| US10050050B2 | Semiconductor device with metal gate memory device and metal gate logic device and method for manufacturing the same | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.