Magnetoresistance element and semiconductor memory device
US8750034B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 13, 2013 |
| Grant date | Jun 10, 2014 |
| Priority date | — |
| Expiry date | Feb 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetoresistance element includes: a first magnetoresistance subelement including a first free magnetization layer, a first tunnel insulating layer and a first fixed magnetization layer, the first tunnel insulating layer interposed between the first free magnetization layer and the first fixed magnetization layer; and a second magnetoresistance subelement including a second free magnetization layer, a second tunnel insulating layer and a second fixed magnetization layer, the second tunnel insulating layer interposed between the second free magnetization layer and the second fixed magnetization layer, wherein the first and second magnetoresistance subelements are stacked each other, and an order of the first free magnetization layer and the first fixed magnetization layer is opposite to an order of the second free magnetization layer and the second fixed magnetization layer in a thickness direction of the magnetoresistance element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.