Structure and method for determining a defect in integrated circuit manufacturing process
US8754372B2 · kind B2 · utility
82Cited by
2References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 6, 2011 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Dec 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/2814
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention discloses a structure and a method for determining a defect in integrated circuit manufacturing process. Test keys are designed for the structure to be the interlaced arrays of grounded and floating conductive cylinders, and the microscopic image can be predicted to be an interlaced pattern of bright voltage contrast (BVC) and dark voltage contrast (DVC) signals for a charged particle beam imaging system. The system can detect the defects by comparing patterns of the detected VC signals and the predicted VC signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.