Semiconductor device
US8754479B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2012 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Sep 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/711
Abstract
An ESD protection element is formed by a PN junction diode including an N+ type buried layer having a proper impurity concentration and a P+ type buried layer and a parasitic PNP bipolar transistor which uses a P+ type drawing layer connected to a P+ type diffusion layer as the emitter, an N− type epitaxial layer as the base, and a P type semiconductor substrate as the collector. The P+ type buried layer is connected to an anode electrode, and the P+ type diffusion layer and an N+ type diffusion layer connected to and surrounding the P+ type diffusion layer are connected to a cathode electrode. When a large positive static electricity is applied to the cathode electrode, the parasitic PNP bipolar transistor turns on to flow a large discharge current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.