Wafer-level interconnect for high mechanical reliability applications
US8754524B2 · kind B2 · utility
6Cited by
6References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 16, 2012 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Feb 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnect structure comprises a solder including nickel (Ni) in a range of 0.01 to 0.20 percent by weight. The interconnect structure further includes an intermetallic compound (IMC) layer in contact with the solder. The IMC layer comprises a compound of copper and nickel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.