Silicon chip of a monolithic construction for use in implementing multiple graphic cores in a graphics processing and display subsystem
US8754897B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2010 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Nov 15, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A silicon chip of a monolithic construction for use in implementing a multiple core graphics processing and display subsystem in a computing system having a CPU, a system memory, an operating system (OS), a CPU bus, and a display device with a display surface. The computing system supports (i) one or more software applications for issuing graphics commands, (ii) one or more graphics libraries for storing data used to implement said graphics commands. The silicon chip comprises multiple graphic pipeline cores, a partial frame buffer for buffering pixels corresponding to image fragments, a routing center, control unit, and a display interface, for displaying composited images on the display surface of the computing system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.