FRAM compiler and layout
US8756558B2 · kind B2 · utility
2Cited by
2References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2012 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Sep 15, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer program for generating a layout for a ferroelectric random access memory (FRAM) that is embodied on a non-transitory storage medium and executable by a processor is provided. FRAM specifications are received, and an FRAM floorplan and design rules are retrieved from the non-transitory storage medium. The layout for the FRAM based on the FRAM specifications and design rules is then assembled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.